technical data 2011, february, rev. 0 1 power supply control with built - in watchdog timer in1232 is designed to monitor power supply within the system of reset signal generation for microprocessors. it is used in monitor systems for controlling va r- ious pro c esses and entities. packaged in 8- pin sop or dip . features: ? rated supply voltage 5.0 v ? accurate 5% or 10% microprocessor power supply monito r ing ? programming of watchdog timer overflow time ? generation of reset signals at power on for correct microproce s sor start. the chip contains reference voltage source, analog comparator, watchdog timer, circuit for monitoring power supply deviation accuracy. . functions: ? reset signal generation after power failure/ error ? reset signal generation from external ?reset? pushbutton ? reset signal generation from watchdog timer fig 1 ? pin assignment table 1 ? absolute maximum ratings symbol parameter typical units min max v supply voltage - 7 . 0 v v ih input voltage, high level - 7 . 0 v v il input voltage, low level - 1 . 0 - v a operating temperature range - 40 +85 t stg storage temperature - 60 +125 * stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condi tions beyond those ind i- cated under ?recommended operating conditions? is not implied. exposure to absolute - maximum - rated conditions for extended periods may affect device reliability. ordering inform a tion il1232n plastic il1232d soic t a = - 40 to 85 c for all packages . in1232 0 6 rst pbrst 0 1 td 0 2 tol 0 3 gnd 0 4 0 5 rst 0 7 st 0 8 vcc
in 1232 2011, february, rev. 0 1 table 2 ? recommended operating conditions symbol parameter typica l units min max v supply voltage 4 . 5 5 . 5 v v ih input voltage, high level 2 . 0 u +0 . 3 v v il input voltage, low level - 0 . 3 0 . 8 v a operating temperature range - 20 +70 table 3 dc electrical characteristics ( t amb = - 40 to + 85) symbol para meter test conditions typical units min max i lil 1 input leakage current, low level, st, tol v cc =5 v 10%, v il =0 v - - 1 i lil 2 input leakage current, low level, td v cc =5 v 10%, v il =0 v - - 300 i lil 3 input leakage current, low level , pbrst v cc =5 v 10%, v il = 0 v - - 1000 i lih1 input leakage current, high level, st , tol v cc =5 v 10%, v ih = v cc - 1 i lih2 input leakage current, high level, td v cc =5 v 10%, v ih = v cc - 300 i o h output current, high level, rst v cc =5 v 10%, v oh =2.4 v - 8 - i ol output current, low level, rst, rst v cc = 5 v 10%, v ol = 0.4 v 8 - m v oh output voltage, high level, rst v cc =5 v 10% , i oh = - 500 v - 0.5 - v v oh1 output voltage, high level, - rst v cc =2 v , i oh = - 500 v - 0.5 - v v ol output voltage, low leve l , rst v cc =2 v , i ol = 1 m - 0.4 v i operating current v cc =5 v 10% - 2 m v cc tp1 v cc trip point tol = gnd 4.5 4.74 v v cc tp2 v cc trip point tol = v cc 4. 2 5 4.49 v
in 1232 2011, february, rev. 0 1 table 4 ? ac electrical characteristics ( amb = from - 4 0 to + 85 ) symbol para meter test conditions typical units min max t td1 watchdog timer overflow time v cc =5.0 v 10% t st 20 ns td = gnd 62.5 250 ms t td2 td disco n nected 250 1000 ms t td3 td = v cc 500 2000 ms t pdly pbrst stable low to rst and rst v cc =5.0 v 10% t pb 2 0 ms - 20 ms t rst reset active time v cc =5.0 v 10% t pb 20 ms 250 1000 ms t rpd v cc fail detect to rst and rst v cc =from 5.0 to 4.0 v t f 10 s - 175 s t rpu v cc detect to rst and rst transition v cc = from 5.0 to 4.0 v t r 1 s 250 1000 ms table 5 ? p in description pin symbol description 01 pbrst pushbutton reset input 02 td time delay set 03 tol selects 5% or 10% v cc detect 04 gnd ground 05 rst reset output (active high) 06 rst reset output (active low, open drain) 07 st strobe input 08 v c c supply output from voltage source
in 1232 2011, february, rev. 0 1 t pb 20 ms t pdly 20 ms 250 ms t rst 1000 ms fig. 2 ? timing diagram of forming reset signal from external pbrst control button t st 20 ? 6 2 . 5 ms t td1 25 0 ms 250 ms t td2 1000 ms 5 0 0 ms t td3 2000 ms fig. 3 ? timing diagram : strobe input ___ st rst t td 1 - t td 3 min max invalid strob va lid strob indeterminate strob t st ______ pbrst v il v ih ____ rst rst t rst t pb t pdly
in 1232 2011, february, rev. 0 1 t f 10 s t rpd 175 s fig. 4 ? timing diagram: power error / down to v cctp t r 1 s 2 50 ms t rpu 1000 ms fig. 5 ? timing diagram: power - up/ stable t f 4 . 75 v 4.5 v 4. 25 v v cc ____ rst rst v ol v oh t rpd rst rst v cc v ol v oh t rpu t r v cctp 4 .75 v 4 .25 v
in 1232 2011, february, rev. 0 1 fig.6 block diagram fig. 7 application circuit : watchdog timer referance voltage source v cc tolerance bias watchdog timer rst rst gnd pbrst td st tol v cc + - in1232
in 1232 2011, february, rev. 0 1 n suffix plastic dip (ms ? 001ba) symbol min max a 8.51 10.16 b 6.1 7.11 c 5.33 d 0.36 0.56 f 1.14 1.78 g h j 0 10 k 2.92 3.81 no tes : l 7.62 8.26 1. dimensions ?a?, ?b? do not include mold flash or protrusions. m 0.2 0.36 maximum mold flash or protrusions 0.25 mm (0.010) per side. n 0.38 d s uffix s oic (ms - 012aa) symbol min max a 4.8 5 b 3.8 4 c 1.35 1.75 d 0.33 0.51 f 0.4 1.27 g h j 0 8 no tes : k 0.1 0.25 1. dimensions a and b do not include mold flash or protrusion. m 0.19 0.25 2. maximum mold flash or protrusion 0.15 mm (0.006) per side p 5.8 6.2 for a; for b ? 0.25 mm (0.010) per s ide. r 0.25 0.5 1.27 5.72 dimens ion, mm dimens ion, mm 2.54 7.62 a b h c k c m j f m p g d r x 45 seating plane 0.25 (0.010) m t -t- 1 8 4 5 l h m j a b f g d se ati ng plane n k 0.25 (0.010) m t -t- c 1 8 4 5
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